• Seminar Series 2020 - Ishfaq Hussain

    3, Mar, 2020 11:30
    Response Time Analysis of Multiframe Mixed Criticality Systems

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  • Ongoing Project:

    Digitalization of the European Industry
    Fraunhofer Gesellshaft
    Volvo Technology AB Sweden
    BMW - Bayrische Motoren Werke AG
    NXP Semiconductors Germany GmbH
     Robert Bosch GMBH
    ABB AG

    Find out more...

  • Ongoing Project:

    Building Trust in the Internet of Things
    NXP Semiconductors
    Philips Nederland
     Robert Bosch GMBH

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  • Ongoing Project:

    Novel Validation Procedures for Highly Automated Systems
    Airbus Defence & Space
    Siemens AG
    Renault SAS
    Toyota Motor Europe

    Find out more...

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21, Nov, 2019

In Memoriam

Stefan M. Petters (1969-2019)

Stefan Petters was a prominent researcher at CISTER from 2009 until 2014. He was research line leader and also had the role of Vice-Director of CISTER. Stefan was an outstanding person, and his energy, wisdom, intelligence and team spirit were instrumental for the growth of CISTER-Labs. Stefan was a prominent member of the international community and his contributions will last long in the memories. Stefan sadly passed way last week, at the age of 50.

13, Nov, 2019

Achievements in Academia

Journal Paper "Empirical Performance Models of MAC Protocols for Cooperative Platooning Applications" published

The Journal Paper entitled "Empirical Performance Models of MAC Protocols for Cooperative Platooning Applications", submitted by CISTER Researchers Pedro Miguel Santos and Luis Almeida is published in Electronics (MDPI).

Vehicular ad-hoc networks (VANET) enable vehicles to exchange information on traffic conditions, dynamic status and localization, to enhance road safety and transportation efficiency. A typical VANET application is platooning, which can take advantage of exchanging information on speed, heading and position to allow shorter inter-vehicle distances without compromising safety. However, the platooning performance depends drastically on the quality of the communication channel, which in turn is highly influenced by the medium access control protocol (MAC). Currently, VANETs use the IEEE 802. 11p MAC, which follows a carrier sense multiple access with collision avoidance (CSMA/CA) policy that is prone to collisions and degrades significantly with network load. This has led to recent proposals for a time-division multiple access (TDMA)-based MAC that synchronize vehicles' beacons to prevent or reduce collisions. In this paper, we take CSMA/CA and two TDMA-based overlay protocols, i.e., deployed over CSMA/CA, namely PLEXE-slotted and RA-TDMAp, and carry out extensive simulations with varying platoon sizes, number of occupied lanes and transmit power to deduce empirical models that provide estimates of average number of collisions per second and average busy time ratio. In particular, we show that these estimates can be obtained from observing the number of radio-frequency (RF) neighbours, i.e., number of distinct sources of the packets received by each vehicle per time unit. These estimates can enhance the online adaptation of distributed applications, particularly platooning control, to varying conditions of the communication channel.

6, Sep, 2019

Fundamental Research Activities

11th National Symposium of Informatics (INForum 2019), in Guimarães

On the 5th and 6th of September 2019, CISTER Researchers Luís Pinto and Miguel Gutiérrez Gaitán presented an oral communication and a poster at the 11th Symposium of Informatics (INForum 2019) held at the Campus Azurém of the University of Minho in Guimarães.

The article, also co-authored by CISTER members Pedro M. Santos and Luís Almeida, had the purpose of showing part of the research being done under the context of project AQUAMON, where CISTER is a partner.

In addition, the analysis presented in this work represents a relevant step on the support of real-time communications for over-water multi-hop networks affected by tides, which is one of the research challenges taken by Miguel in his Ph.D. studies.



25, Jul, 2019

Fundamental Research Activities

Periodic Seminar on Home Appliances Energy Consumption

Yoan Caille and Rochan Ramful, two undergrad students from ESIEE Paris, visited CISTER from May to July. Their work has been developed within the context of the FLEXIGY project, where they had developed algorithms for the scheduling of home appliances energy consumption on a local smart grid. These algorithms try to maximize the use of local production from Photovoltaic Panels or any other renewable sources.
Their internship was supported by the ERASMUS initiative.

25, Jul, 2019

Fundamental Research Activities

RTSS Technical Programme Committee Meeting and RTSOPS Workshop

On July 25, CISTER Researchers Geoffrey Nelissen and Konstantinos Bletsas participated to the technical programme committee meeting of the 40th IEEE Real-TIme Systems Symposium (RTSS 2019).

The TPC meeting took place in the offices of INRIA in Paris, France. RTSS is the premier international venue for real-time systems.

On the day before the TPC meeting, both researchers also attended the RTSOPS workshop. During the workshop, sixteen short talks on open problems on real-time systems were presented by recognized researchers from the real-time systems community.

25, Jul, 2019

Fundamental Research Activities

25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications in Hangzhou

CISTER Researchers Eduardo Tovar and Ali Awan attended the 25th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2019) in Hangzhou, China.

Eduardo Tovar was General Co-Chair and Steering Committee member and Ali Awan presented the paper entitled "Memory Bandwidth Regulation for Multiframe Task Sets" in the main conference.

It is the goal of the RTCSA to bring together researchers and developers from academia and industry to promote cross-fertilization and discuss advances and trends in the technology of embedded and real-time systems and their emerging applications, including the Internet of Things and Cyber-Physical Systems.


24, Jul, 2019

Fundamental Research Activities

KhronoSim Final Evaluation meeting in Coimbra

On July 24, CISTER Researcher Cláudio Maia attended the final evaluation meeting for the KhronoSim project.
In this meeting two evaluators assessed the project in terms of achieved objectives and results. After careful evaluation and discussion, the project was deemed a success as all the objectives for the project were achieved, resulting in the development of two demonstrators for the KhronoSim test platform: an automotive instrument cluster and a satellite.
In the project, among other tasks, the CISTER team was responsible for studying the state of the art of emulation for multicore systems and integrating the KhronoSim test platform with the selected emulator. The emulator selected for the project was QEMU, one of the most versatile emulators currently available in the market, on top of which CISTER developed the KhronoSim QEMU Module that allows one to instance, manage and control, via the KhronoSim platform, several QEMU instances.

12, Jul, 2019

Fundamental Research Activities

31st Euromicro Conference on Real-Time Systems, ECRTS 2019, in Stuttgart, Germany

4, Jul, 2019

Industry Collaborations

CISTER Researchers participated in TECH@PORTUGAL at Âlfandega do Porto

4, Jul, 2019

Fundamental Research Activities

Distinguished Seminar on the Internet-of-Things (IoT) and Artificial Intelligence (AI)

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